SUNNYVALE, Calif.–(BUSINESS WIRE)–#AI—Ausdia, a provider of design constraints verification and management solutions, announced today its participation in the TSMC Open Innovation Platform® (OIP) Electronic Design Automation (EDA) Alliance. As a new member of this prestigious ecosystem, Ausdia will integrate its Timevision™ platform with TSMC’s process technologies, providing enhanced EDA tools that help customers meet the increasing design complexity of today’s semiconductor applications.
The TSMC OIP EDA Alliance encompasses the industry’s leading EDA tool providers, working together to ensure the most optimized design methodologies and flows for TSMC’s advanced nodes. Ausdia’s inclusion in this alliance will allow its innovative constraint management and verification tools to seamlessly support chip designers in developing AI, automotive, high-performance computing (HPC), and other demanding designs with greater accuracy and speed.
“We are excited to join TSMC’s OIP EDA Alliance and extend our Timevision platform to this dynamic ecosystem,” said Sam Appleton, CEO of Ausdia. “This collaboration ensures that our mutual customers working on cutting-edge designs can take full advantage of TSMC’s advanced process nodes, while optimizing their timing constraints to improve overall design performance and accelerate time-to-market.”
Ausdia’s Timevision platform offers a unique approach to timing constraints development and management, addressing key challenges in AI and large SoC designs, including memory consumption and performance optimization. With this partnership, Ausdia will provide robust constraint solutions to enable semiconductor designs using TSMC’s industry-leading technologies, streamlining the design process and enhancing design quality.
“The addition of Ausdia to the TSMC EDA Alliance will further strengthen our OIP ecosystem and enable our mutual customers to manage complex designs efficiently,” said Dan Kochpatcharin, Head of the Ecosystem and Alliance Management Division at TSMC. “Together with our OIP ecosystem partners, we are pushing the boundaries of semiconductor design and accelerating innovation for the next generation of AI applications.”
About Ausdia
Founded in 2006 and headquartered in Sunnyvale, California, Ausdia delivers standout timing constraint development, verification, and management solutions that complement all implementation and timing signoff flows. The Timevision platform supports designs with over 1 billion cells and thousands of clocks, enabling developers to gain significant productivity and efficiency improvements across the design lifecycle. Ausdia’s customers include leading semiconductor companies worldwide, and the company’s solutions are used extensively in the development of SoCs and ICs for AI, HPC, and automotive. For more information, visit Ausdia’s website.
Contacts
Michelle Clancy Fuller, President, Cayenne Global
[email protected]
Phone: +1 503.702.4732